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Offer summary
(Summary generated by AI based on the full job description)
The project focuses on verification of embedded devices with emphasis on system‑level HW‑SW interaction. The tech stack includes SystemVerilog, UVM and VIP: PCIe, DDR, AXI. Responsibilities cover full verification lifecycle: building environments from scratch, developing drivers, monitors, scoreboards and coverage models, defining verification sequences and test plans, integrating reference models and establishing verification methodologies and infrastructure. Required minimum 5 years verification experience.
Senior Verification Engineer (UVM/SystemVerilog)
Company: SQUARE ONE RESOURCES sp. z o.o.
from: 14 October 2026
to: 13 November 2026
150 - 170 złnet (+ VAT)/ hr.B2B contract (full-time)
Offer parameters
level:senior
working mode:remote
location:Warszawa, Masovian
Warszawa, Masovian
Requirements
Expected technologies
UVM
SystemVerilog
Optional technologies
C
C++
Python
SystemC
Our requirements
- At least 5 years of verification experience.
- Proven ability to build verification environments from the ground up.
- Experience with UVM and SystemVerilog.
- Strong knowledge of Verification IPs and industry-standard protocols, including PCIe, DDR, and AXI.
Optional
- Understanding of hardware-software interaction.
- Experience with C, C++, Python, or SystemC.
Your responsibilities
- Perform the full range of functional verification activities.
- Develop verification environments from scratch, including drivers, monitors, scoreboards, and coverage models.
- Integrate Verification IPs (VIPs) for protocols such as DDR, PCIe, and AXI.
- Define and implement verification sequences for complex control-flow scenarios.
- Gain a system-level understanding of products with strong hardware-software interaction.
- Integrate and maintain reference models.
- Define and execute test plans.
- Establish verification methodologies, flows, and supporting infrastructure.
This is how we organize our work
This is how we work
at the client's site
SQUARE ONE RESOURCES sp. z o.o.
At Square One Poland we link IT experts with the business. With over 25 years of experience, we specialize in recruitment processes on a global scale. Despite years of experience, we still have a startup DNA and this is our advantage. Our offices are located in London and Warsaw, however, we can reach clients from all over the world, from start-ups to big worldwide corporations.
This is how we work
Senior Verification Engineer (UVM/SystemVerilog)
150–170 zł / hr. (B2B)
I apply to:
SQUARE ONE RESOURCES sp. z o.o.
Warszawa, Masovian
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